The present technology relates to an amplifier, a driving method for the amplifier, and an electronic circuit system, and more specifically, to an amplifier, a driving method for the amplifier, and an electronic circuit system that can secure variable gain ranges without an increase in circuit area.
In telecommunication systems and the like, variable gain amplifiers (VGA) are used to widen a dynamic range (refer, for example, to Japanese Patent Application Laid-open No. 2004-7706). According to Japanese Patent Application Laid-open No. 2004-7706, gain can be switched through digital control. With this, necessary variable gain ranges are secured.
FIG. 1 is a diagram of a configuration of a variable gain amplifier in related art.
In this variable gain amplifier, an input signal voltage to be input from an input terminal (RFIN) is converted to electric current at an NMOS transistor M1, and this electric current is split in accordance with a size ratio between an NMOS transistor M2 and an NMOS transistor M3 provided as a shunt unit cell. With this, a variable output signal voltage is output from a drain of the NMOS transistor M2 on a load side to an output terminal (RFOUT).
Further, gain of the variable gain amplifier of FIG. 1 can be expressed by the following equation (1).
                                                        Gain              =                            ⁢                                                Vout                  Vin                                =                                                      (                                                                  Gm                        ⁡                                                  (                                                      M                            ⁢                                                                                                                  ⁢                            2                                                    )                                                                                                                      Gm                          ⁡                                                      (                                                          M                              ⁢                                                                                                                          ⁢                              2                                                        )                                                                          +                                                  Gm                          ⁡                                                      (                                                          M                              ⁢                                                                                                                          ⁢                              3                                                        )                                                                                                                )                                    ⁢                  gm                  ×                  Load                                                                                                        =                            ⁢                              α                ×                gm                ×                Load                                                                        (        1        )            
In other words, in the variable gain amplifier of FIG. 1, of electric current to flow through the NMOS transistor M2 and the NMOS transistor M3, proportion of electric current to flow through the load is determined based on the size ratio between the NMOS transistor M2 and the NMOS transistor M3, and a gain factor α is expressed by Gm(M2)/Gm(M2)+Gm(M3). Note that, in the equation (1), Gm(M2) and Gm(M3) respectively represent transconductances of the NMOS transistors M2 and M3, and gm represents a transconductance of the NMOS transistor M1.
Further, in order to obtain necessary variable gain ranges using the variable gain amplifier in related art, the configuration as shown in FIG. 2 is employed. Specifically, in the variable gain amplifier of FIG. 2, in order to obtain the necessary variable gain ranges, a plurality of shunt unit cells that have the same total size are arrayed.
More specifically, in the variable gain amplifier of
FIG. 2, the NMOS transistors M2 and M3 are provided in a pair, and a control voltage V1 is input to gates of those transistors. Electric current of the NMOS transistor M2 is used, and a gain factor thereof is represented by α1. Further, NMOS transistors M4 and M5, and NMOS transistors M6 and M7 are respectively provided in pairs, and control voltages V2 and V3 are respectively input to gates of those pairs of transistors. Gain factors of those pairs are respectively represented by α2 and α3.
In a case where a threshold voltage is set to Vth and where the control voltages applied to the gates of the NMOS transistors satisfy the relationships of V1−V2>Vth and V1−V3>Vth, gain (Gain1) expressed by the following equation (2) is obtained.Gain1=α1×gm×Load   (2)
Similarly, in a case where the control voltages satisfy the relationships of V2−V1>Vth and V2−V3>Vth, gain (Gain2) expressed by the following equation (3) is obtained. Further, in a case where the control voltages satisfy the relationships of V3−V1>Vth and V3−V2>Vth, gain (Gain3) expressed by the following equation (4) is obtained.Gain2=α2×gm×Load   (3)Gain3=α3×gm×Load   (4)
In this way, in the variable gain amplifier of FIG. 2, in a case where a desired gain of, for example, 3 dB, −6 dB, or −9 dB is determined, the control voltages V1, V2, and V3 are applied in accordance with the gain respectively to the pairs of the gates of the NMOS transistors. With this, when the plurality of arrayed shunt unit cells are switched, necessary variable gain ranges can be obtained.